1. Field of the Invention
The present invention relates to a nitride semiconductor device constituted of group III nitride semiconductors and a method for producing the same. The group III nitride semiconductors are semiconductors expressed in a general formula AlxInyGa1-x-yN (0≦x≦1, 0≦y≦1 and 0≦x+y≦1).
2. Description of Related Art
Conventionally, a power device using a silicon semiconductor is employed for a power amplifier circuit, a power supply circuit, a motor driving circuit or the like.
However, improvement in withstand voltage, reduction in resistance and improvement in speed of a silicon devices are now reaching the limits due to the theoretical limit of the silicon semiconductor, and it is becoming difficult to satisfy requirements of the market.
Therefore, development of a nitride semiconductor device having characteristics such as a high with stand voltage, a high-temperature operation, a high current density, high-speed switching and small on-resistance is examined.
FIG. 8 is a schematic sectional view for illustrating the structure of a conventional nitride semiconductor device.
This nitride semiconductor device includes a sapphire substrate 81 and a multilayer structure portion 93 of an n-p-n structure formed by an undoped GaN layer 82, an n-type GaN layer 83, a p-type GaN layer 84 ad an n-type GaN layer 85 successively laminated on the sapphire substrate 81.
A mesa multilayer portion 92 having a mesa shape is formed in the multilayer structure portion 93 by etching the same from the surface of the n-type GaN layer 85 up to an intermediate portion of the n-type GaN layer 83. Both side surfaces of the mesa multilayer portion 92 are formed by inclined surfaces 91 inclined with respect to the laminating interfaces of the multilayer structure portion 93. A gate insulating film 86 made of SiO2 (silicon oxide) is formed on the surface (including the inclined surfaces 91) of the multilayer structure portion 93.
Contact holes are formed in the gate insulating film 86 for partially exposing the n-type GaN layers 85 and 83 respectively. A source electrode 88 is formed on the portion of the n-type GaN layer 85 exposed from the corresponding contact hole, to be in ohmic contact with the n-type GaN layer 85. On the other hand, drain electrodes 89 are formed on the portions of the n-type GaN layer 83 exposed from the corresponding contact holes, to be in ohmic contact with the n-type GaN layer 83. Gate electrodes 87 are formed on portions of the gate insulating film 86 opposed to the inclined surfaces 91.
Interlayer dielectric films 90 made of polyimide are interposed between the adjacent ones of the source electrode 88, the drain electrodes 89 and the gate electrodes 87 respectively, thereby isolating these adjacent electrodes from one another.
The n-p-n structure of this vertical MOSFET is prepared by epitaxially growing the undoped GaN layer 82 on the substrate 81 and successively epitaxially growing the n-type GaN layer 83, the p-type GaN layer 84 and the n-type GaN layer 85 thereon by MOCVD (Metal Organic Chemical Vapor Deposition), for example. In the steps of forming the n-type GaN layers 83 and 85, source gas containing silicon as an n-type impurity is fed into a treating chamber along with gallium and nitrogen, for example, thereby growing GaN crystals containing silicon. In the step of forming the p-type GaN layer 84, on the other hand, source gas containing magnesium as a p-type impurity is fed into the treating chamber along with gallium and nitrogen, for example, thereby growing a GaN crystal containing magnesium.
When the n-type GaN layer 85 is crystal-grown on the p-type GaN layer 84, however, transistor characteristics may be deteriorated due to a large quantity of magnesium contained in the n-type GaN layer 85. More specifically, a large quantity of source gas containing a p-type impurity (magnesium, for example) remains in the treating chamber immediately after the p-type GaN layer 84 is crystal-grown therein. Therefore, the p-type impurity remaining in the atmosphere of the treating chamber is incorporated when the n-type GaN layer 85 is thereafter crystal-grown. Consequently, the n-type GaN layer 85 contains a large quantity of the p-type impurity, to have high resistance. Magnesium is generally employed as the p-type impurity, and hence the aforementioned phenomenon is referred to as “Mg memory effect”.
In order to avoid this problem, the substrate 81 may be taken out from the treating chamber into the air atmosphere after the formation of the p-type GaN layer 84, and the n-type GaN layer 85 may be thereafter regrown in this treating chamber or another treating chamber. In this case, however, the substrate 81 must be cooled to room temperature in the treating chamber, before the same is taken out into the air atmosphere. In this cooling period, a large quantity of magnesium is introduced into the surface layer portion of the p-type GaN layer 84. Consequently, a large quantity of magnesium is introduced into the interface between the p-type GaN layer 84 and the n-type GaN layer 85 laminated thereon, and hence the peak of the Mg concentration appears in the vicinity of the interface. This region (particularly regions in the n-type semiconductor layers) having a high Mg concentration exhibits high electrical resistance, to disadvantageously increase the on-resistance of the transistor.
Further, the surface of the p-type GaN layer 84 taken out into the air atmosphere is oxidized, and hence it is difficult to improve the quality of the regrown n-type GaN layer 85.